Embedded Lab

Controlling a DC Motor with Complementary PWM

Complementary PWM is needed in many power system applications like three phase motor control, sine wave inverters, BLDC motor control, etc. STC8A8K64S4A12 fortunately adds features to generate complementary PWMs for the applications aforementioned.

Code

 #include "STC8xxx.h"
 #include "BSP.h"
  
 #define dead_time_cnt               1
 #define pwm_max_cnt                 400 
  
 #define PB_1                        !P12_get_input
 #define PB_2                        !P13_get_input
  
 void setup(void);
 void set_PWM_duty(signed int value);
  
 void main(void)
 { 
   signed int duty = 0;
   
   setup();
   
   while(1)
   {
       if(PB_1)
       {
           duty += 10;
           delay_ms(100);
           
           if(duty >= pwm_max_cnt)
           {
             duty = pwm_max_cnt;
           }
       }
       if(PB_2)
       {
           duty -= 10;
           delay_ms(100);
           
           if(duty <= 0)
           {
             duty = 0;
           }
       }
       if(PB_1 || PB_2)
       {
         set_PWM_duty(duty);
       }
   };
 }
  
 void setup(void)
 {
   CLK_set_sys_clk(IRC_24M, 2, MCLK_SYSCLK_no_output, MCLK_out_P54);
   
   P12_input_mode;
   P13_input_mode;
   
   PWM_clk_set(PWM_clk_sys_PS, PWM_clk_ps_sys_clk_div_1);
   
   PWM_set_counter(pwm_max_cnt);
   
   PWM0_setup(PWM_pin_is_PWM_output, \
              PWM_init_lvl_low, \
              PWM_0_pin_P10, \
              PWM_level_normal);
   
   PWM1_setup(PWM_pin_is_PWM_output, \
              PWM_init_lvl_low, \
              PWM_1_pin_P11, \
              PWM_level_normal);   
   
   PWM_start_counter;
 }
  
 void set_PWM_duty(signed int value)
 { 
   PWM_set_PWM0_T1(value);
   PWM_set_PWM0_T2(0);
   
   PWM_set_PWM1_T1(pwm_max_cnt - dead_time_cnt);
   PWM_set_PWM1_T2(value + dead_time_cnt);     
 } 

Schematic

Explanation

Since complementary PWM is a requirement for proper motor drive, the demo here is a rudimentary DC motor drive example with STC’s complementary PWM and a L293 motor driver. The motor’s speed is governed by PWM duty cycle alternation. Pressing buttons assigned with pins P1.2 and P1.3 changes motor speed.

The system clock is set to 12MHz.

 CLK_set_sys_clk(IRC_24M, 2, MCLK_SYSCLK_no_output, MCLK_out_P54); 

The same clock is used by the enhanced PWM module. Most of the stuffs in the setup are like the previous PWM examples.

 #define dead_time_cnt               1
 #define pwm_max_cnt                 400 
  
 ....
  
 PWM_clk_set(PWM_clk_sys_PS, PWM_clk_ps_sys_clk_div_1);
   
 PWM_set_counter(pwm_max_cnt);
   
 PWM0_setup(PWM_pin_is_PWM_output, \
            PWM_init_lvl_low, \
            PWM_0_pin_P10, \
            PWM_level_normal);
   
 PWM1_setup(PWM_pin_is_PWM_output, \
            PWM_init_lvl_low, \
            PWM_1_pin_P11, \
            PWM_level_normal);   
   
 PWM_start_counter; 

The math behind PWM generation is same as the ones we have already seen:

The logic analyser data proves that the above figures are correct:

Now imagine a SR flip-flop with outputs T1 and T2. So far, we have seen that varying T1 and T2 alter PWM duty cycle. Thus, S and R can be imagined as logic transition counts. When the PWM counter reaches up to these values, high-to-low or low-to-high transition occurs in the PWM waveform.

To generate complementary PWM, we would need two PWM channels and so in this example PWM channels 0 and 1 are selected. The word “complementary” suggests that two things are opposite of the other and so in such PWM technique, there are two PWMs that have opposite logic polarities. This is the simplistic presentation of complementary PWM.

In ideal terms, if one PWM channel is running with 40% duty cycle, the other should be running at 60% (-40%) duty cycle. However, doing so practically would lead to some issues because when one PWM is going from high-to-low transition, the other is doing just the opposite and during these transition times at some point both PWMs are at same logic level. If these PWMs are fed to external devices like transistors or MOSFETs as shown below then quite possibly during the transition times both MOSFETs would be momentarily turn on, leading to temporary short-circuit and unnecessary overheating. The temporal short circuit may even cause the external devices to get damaged or cause momentary power shortages. To avoid this phenomenon, we have to apply dead-time technique to ensure that the transitions occur separately with some minute delay.  

Now let’s see how the PWM duty cycle is ensured while maintaining the needs so far discussed. The following code snippet is responsible for maintaining PWM duty cycles in complementary format. It may look confusing unlike the previous examples.

 #define dead_time_cnt               1
 #define pwm_max_cnt                 400 
  
 ....
  
 void set_PWM_duty(signed int value)
 { 
   PWM_set_PWM0_T1(value); 
   PWM_set_PWM0_T2(0);
   
   PWM_set_PWM1_T1(pwm_max_cnt - dead_time_cnt);
   PWM_set_PWM1_T2(value + dead_time_cnt);     
 } 

The confusion will vanish after carefully looking at the math below. Imagine that we want to set the duty cycle to 75%.

As the math shows due to the application of dead-time, PWM1’s duty cycle is slightly less than the ideal 25% mark. In this example, 1 count of dead time is equivalent to 0.25% duty cycle and since there are two such counts the total duty cycle is reduced by 0.5%.    

Demo

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