Embedded Lab

External Interrupt (EXTI)

STC microcontrollers have complex interrupt systems. Literally, all internal peripherals have interrupt capabilities. The block diagram of STC8A8K64S4A12’s interrupt system shows this. In this section, we would see the use of external interrupt and in later examples we would see other interrupts.

External interrupt has lot of uses in modern embedded systems. When coupled with low power consumption modes, external interrupts can be used to wake up a device and do certain task upon user’s stimulated input via a button, keypad, touchpad, etc. External interrupts are what used in most portable battery-operated devices like computer mice, keyboards, remote controllers, etc. In such devices, precious battery energy is conserved by spending most time in low power modes and waiting for user interactions. When there is a user input, external interrupts are kicked in and some tasks are done quickly before returning to dormant low power modes.  

Code

 #include "STC8xxx.h"
 #include "BSP.h"
  
 unsigned char s = 0;
 unsigned int i = 0;
  
 void setup(void);
     
  
 void EXT_0_ISR(void)        
 interrupt 0 
 {
     for(s = 0; s <= 9; s++)
     {
         P55_toggle;
         for(i = 0; i < 10000; i++);
     }
 }
  
 void EXT_1_ISR(void)        
 interrupt 2
 {
     for(s = 0; s <= 9; s++)
     {
         P55_toggle;
         for(i = 0; i < 30000; i++);
     }
 }
  
 void main(void)
 {
     setup();
     
     while(1)
     {
         P55_low;        
     };
 }
  
 void setup(void)
 {
     CLK_set_sys_clk(IRC_24M, 24, MCLK_SYSCLK_no_output, MCLK_out_P54);
     
     P55_open_drain_mode;
             
     EXT_0_priority_0;
     EXT_0_falling_edge_detection_only;
     _enable_EXT_0_interrupt;
        
     EXT_1_priority_1;
     EXT_1_falling_edge_detection_only;
     _enable_EXT_1_interrupt;
     
     _enable_global_interrupt;
 } 

Schematic

Explanation

First, let us see how we can enable external interrupt. Although external interrupts are GPIO input feature, we do not have to set external interrupt pins as inputs. This is done automatically and internally.

8051 architecture allows prioritization of interrupts. This means that when there are simultaneous multiple interrupts, the interrupts are served in an orderly fashion according to the level of priority. STC8A8K64S4A12 has 22 interrupt sources and 4 levels of priority. Although it is not mandatory to set priority in most cases, some applications may need this feature. In this demo code, external interrupt 1 has higher priority than external interrupt 0 and so it would be processed first and then external interrupt 0 would be processed afterwards.

 EXT_0_priority_0;
 EXT_0_falling_edge_detection_only;
 _enable_EXT_0_interrupt;
        
 EXT_1_priority_1;
 EXT_1_falling_edge_detection_only;
 _enable_EXT_1_interrupt;    
  
 _enable_global_interrupt; 

The next thing to do when setting external interrupts is to let the MCU know which edges would trigger the interrupts. Finally, the interrupts are enabled along with global interrupt flag bit.

Like other examples onboard LED is used as an indicator. Inside each interrupt service routine, this LED is toggled but the rates of toggling are different. This would differentiate the interrupts. 

 void EXT_0_ISR(void)        
 interrupt 0 
 {
     for(s = 0; s <= 9; s++)
     {
         P55_toggle;
         for(i = 0; i < 10000; i++);
     }
 }
  
 void EXT_1_ISR(void)        
 interrupt 2
 {
     for(s = 0; s <= 9; s++)
     {
         P55_toggle;
         for(i = 0; i < 30000; i++);
     }
 } 

When external interrupt 0 is triggered, the LED toggles fast and when external interrupt 1 is triggered, the LED toggles slowly. If external interrupt 0 is triggered while external interrupt 1 is being processed, external interrupt 0’s task is processed after completing external interrupt 1’s service routine. It is as if the MCU remembers the low priority interrupt after completing the higher priority interrupt. If external interrupt 1 is triggered while external interrupt 0 is being processed, the tasks in external interrupt 0 is temporarily suspended and external interrupt 1 is processed. After processing external interrupt 1, the suspended tasks of external interrupt 0 are resumed from where they were left. 

Demo

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